C++代写：ECE244 A Resistor Network Simulator

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练习Linked List的使用方法，代写并实现一个电阻网络仿真器。

Objectives

This assignment will give you practice in creating and manipulating linked lists in C++. You will also see how to programs can be used to simulate hardware circuitry.

Problem Statement

The lab builds on Lab 3, but adds several new features.

  • You will replace arrays with linked lists to eliminate the maximum-size limitations of the previous program, and to allow you to implement the delete resistor command.
  • You will add a new solve capability to the program so that it can find the dc voltage at each node.

Preparation & Background

This lab builds on the previous lab in its use of classes, constructors, and member functions. You should review the textbook and lecture notes pertaining to the following topics:

  • Constructors and destructors
  • Class member variables and functions
  • Public/private access types
  • Dynamic memory management with new and delete
  • Linked lists

Specifications

The program shall build on the program you developed in Lab 3, with the most siginificant modifications summarized in the following list. Detail is given in the appropriate subparts of Sec 4 below.

  • The program shall accept any number of resistors, nodes, and resistors per node using linked lists
  • The program will no longer require or accept the maxVal command, and also need not accept the printR all command
  • The program will now accept the delete resistor command
  • In the printNode all command, nodes containing no resistors shall not be printed
  • Your program shall implement new commands to set the voltage of a node to a fixed value, and to solve for the voltages at other nodes.

Coding Requirements

  1. The Standard Template Library (STL) shall not be used - the point of this assignment is for you to create your own linked list implementation
  2. There shall be no predefined maximum number of resistors, nodes, or resistors per node
  3. No global variables shall be used
  4. Linked lists shall be used to replace the array of resistors, nodes, and resistors attached to each node
  5. All class data member variables, including Node and Resistor, shall be of private access type
  6. The corresponding Resistor object(s) shall be deleted (memory freed) when the deleteR command is entered
  7. The program shall not leak memory

Input

The commands your program must accept, the output each generates if it successful, and the action to take are listed in Table 1. Commands that are new to this lab are in the top portion of the table, while those that are carried over from Lab 3 are in the lower part of the table.
For each valid line of input (i.e. each line not causing an error as defined in Section 4.3), one or more lines of output shall be produced as described in Table 1 and below. The values in italics must be replaced by either the value given in the command, or the value already stored (eg. resistance old in the modifyR output defined in Table 1). Strings must be reproduced exactly as entered. An example session is provided in Sec 5 to illustrate this.

Error Checking

Input shall be checked for errors as described in Lab 3, except that the program shall no longer produce errors for “resistor array is full” or “node is full” because the linked list implementation has no set maximum size. There is also no longer an error for node values being out of range - any integer is now a valid node id (even a negative integer). Table 2 lists the errors for which your program must check. If more than one error occurs on a line of input, only one error message shall be issued: the first error message occuring as arguments are processed from left to right. If a single argument has more than one error, the one listed first in Table 2 should be printed.

Output

printR and printNode command output

Resistance information should be printed identically to Lab 3, except that the printR all command will not be used or tested in this lab. Node information should be printed in the same way as Lab 3, except that nodes with no resistors should not be printed. Nodes shall be printed in ascending order of node ID, and the resistors attached to a node shall be printed in the order in which they were added to the node.

solve command

The solve command first determines the voltage of every node, and then it prints the voltage of every node in ascending node order. To find the voltage at every node in a network, we can follow the iterative procedure below.1

1
2
3
4
5
6
Initialize the voltage of all nodes without a specified (setV) voltage to 0.
while (some node's voltage has changed by more than MIN ITERATION CHANGE) {
  for (all nodes without a set voltage) {
    set voltage of node according to Eq.
  }
}

The voltage of a node is computed from the voltages of its neighbours according to Kirchoff’s current equation, which states that the total current entering or leaving a node must be 0. Consider node0 below, which is surrounded is connected by 3 resistors to 3 other nodes, as shown in Fig. 1.
The total current entering node0 must be 0:

Ia + Ib + Ic = 0

We can rewrite this using the fact that the current through each resistor is simply the voltage across it divided by its resistance.

Once your solver has converged, print (to cout) the voltage of every node that has at least one resistor connected to it, in ascending node order. For the example shown in Fig 2, the solve command would print:

Suggested Data Structure

This section discusses one data structure for your circuit that you may opt to use, diagrammed in Fig 3. The primary object representing the circuit is a NodeList. The NodeList holds a linked list of Nodes, each of which contains a ResistorList holding Resistors. For each resistor that is added to the circuit, two copies are created: one for each Node it connects to within the NodeList.
Functions that may be useful in NodeList include:

  • “Find node”: Accept a node ID and return a pointer to the corresponding Node, or NULL if it does not exist
  • “Find or insert node”: Accept a node ID and return a pointer to the corresponding Node if it exists, or create a new one
  • Determine if a resistor with a given label exists in any of the Nodes
  • Change the resistance of a resistor by name (or return a failure indication)
  • Delete a resistor by name (or return a failure indication)
  • Delete all resistors in the list

Likewise, functions that may be useful in ResistorList include:

  • Insert a resistor at the end of the list
  • Find a resistor by name, returning a pointer to it
  • Delete a resistor given a pointer

Helpful Hints

  • You should re-use your code from the previous lab to the extent possible. You will need to alter the data structures, and possibly make small output alterations.
  • The global variables that hold the node and resistor arrays in Lab 3 should be deleted. Their functionality will now be provided by objects of class NodeList and ResistorList.
  • To avoid use of global variables, you should create your NodeList object within main() and pass a reference to it (NodeList&) to any function that needs access (eg. your parser, add/change/remove commands, etc.)
  • You will need new data members in class Node to store the voltage, and whether the node has a fixed voltage (setV) or not.
  • Each block of memory allocated by new must be freed by delete exactly once.
  • The linked list will start empty. You will need to create objects of class Node as you go (as they are referenced by resistors that are added). It may be useful to you to create Node* NodeList::findOrInsert(int nodeID) which finds or creates a node with the given ID.
  • When using dynamic memory, think carefully if a class needs a destructor and what objects it might need to delete (hint: anything where the class holds the only pointer to a memory block allocated with new).
  • Listing all nodes correctly will be made easier if you maintain your node list in ascending order of node ID.
  • If you use the suggested data structure, remember when adding/changing resistors that you will have two copies of each resistor.
  • Use of the valgrind memory tester is strongly recommended to catch invalid reads, writes, and allocation/deallocation. It will tell you when and on what function and line the error occurs. For memory leaks, it will tell you where the leaking block was allocated.
  • There are several corner cases that, in principle, require special handling. However, you should ignore these cases and your code will NOT be tested against these cases.
    • It is possible to have nodes that are not connected to anything. You should ignore this case.
    • It is also possible to have two disjoint networks, one with voltage and one that is “floating”. You should also ignore this case.
    • You may assume that no resistor will have a 0 value.

Procedure

Create a lab4 folder with appropriate permissions in your ece244 directory. Before submitting, remember to use exercise, plus to make some test cases of your own as exercise will not test all cases.

Deliverables

You must submit all source files to permit your project to compile. They should be:

  • Main.cpp
  • Rparser.cpp and Rparser.h
  • ResistorList.h and ResistorList.cpp
  • Resistor.h and Resistor.cpp
  • Node.h and Node.cpp
  • NodeList.h and NodeList.cpp